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9X14 mm SMD, 3.3V, LVPECL Frequency Range:
Frequency Stability: Temperature Range: (Option X) Storage: Input Voltage: Control Voltage: Input Current:
CVPD-970 Model
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622.08MHz to 670MHz
25ppm 0C to 70C -40C to 85C -55C to 120C 3.3V 0.3V 1.65V 1.65V 80mA Max Differential LVPECL 49/51% Typ, 45/55% Max 0.4ns Max @ 20% to 80% Vcc 50ppm Min. 10% Max into 50 ohms Vcc-0.96V Min, Vcc-0.81V Max Vcc-1.85V Min, Vcc-1.65V Max 100ns Max 2ms Typ., 10ms Max >10KHz @ -3dB -40dBc <5ps RMS (1-sigma) Max <1ps RMS (1-sigma) Max, <1ps RMS (1-sigma) Max, -80 dBc/Hz -108 dBc/Hz -132 dBc/Hz -140 dBc/Hz <3ppm 1st/yr, <2ppm every year thereafter
Output: Symmetry: Rise/Fall Time: Pullability APR: Linearity: Load: Terminated to Vdd-2V Logic "1" Level: Logic "0" Level: Disable Time: Start-up Time: Modulation BW: Sub-harmonics: Period Jitter: Phase Jitter: (20,000 periods) 12KHz~20MHz 50KHz~80MHz
Phase Noise Typical: 100Hz 1KHz 10KHz 100KHz Aging:
Applications: 10 Gigabit Ethernet OC192: Forward Error Correction Broadband Networks SONET/SDH/DWD ATM Network/switch Telecom Designed using FR5 PCB & HFF crystal technology to provide a very Low Noise, Low Jitter Voltage Controlled Clock Oscillator solution at a competitive price.
Specifications subject to change without notice.
TD-030607 Rev.C Page 1 of 2
CVPD-970 Model 9X14 mm SMD, 3.3V, LVPECL
Crystek Part Number Guide CVPD-970 X-622.080
#1 #2 #3 #4
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0.560 (14.2)
0.360 (9.14)
#1 Crystek 9x14 SMD PECL VCXO #2 Model 970 = High Frequency 3.3V #3 Temp. Range: Blank = 0/70C, X=-40/85C #4 Frequency in MHz: 3 or 6 decimal places
CRYSTEK P/N Frequency Date Code
0.560 (14.2)
Bottom View
1 6
0.100 (2.54)
2 5
3 4
0.040 (1.01) 0.070 (1.77)
Example: CVPD-970X-622.080 = 3.3V, -40/85C, 622.080 MHz
0.210 (5.3)
SUGGESTED PAD LAYOUT
0.050 (1.27)
Standard Frequencies MHz 622.0800 666.5143 669.1281 625.0000 669.3265 644.5313
Pad 1 2 3 4 5 6
Connection Volt Cont. E/D GND OUT COUT Vdd
0.090 (2.28) 0.280 (7.11)
RECOMMENDED REFLOW SOLDERING PROFILE TEMPERATURE
260C 217C 200C 150C
Ramp-Up 3C/Sec Max. Critical Temperature Zone Ramp-Down 6C/Sec.
0.200 (5.08)
Enable/Disable Function Pin 2
Preheat 180 Secs. Max. 8 Minutes Max. 90 Secs. Max.
Output Pin
260C for 10 Secs. Max. NOTE: Reflow Profile with 240C peak also acceptable.
Open Active "0" level Vcc-1.620V Max Active "1" level Vcc-1.025V Min Disabled Disabled State: Pin 4 will assume a fixed level of logic "0" Pin 5 will assume a fixed level of logic "1"
Mechanical: Shock: Solderability: Vibration: Solvent Resistance: Resistance to Soldering Heat: Environmental: Thermal Shock: Moisture Resistance: Packaging: Tape/Reel:
MIL-STD-883, Method 2002, Condition B MIL-STD-883, Method 2003 MIL-STD-883, Method 2007, Condition A MIL-STD-202, Method 215 MIL-STD-202, Method 210, Condition I or J MIL-STD-883, Method 1011, Condition A MIL-STD-883, Method 1004 100ea, 250ea,500ea 24mm Tape
Specifications subject to change without notice.
TD-030607 Rev.C Page 2 of 2

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